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Designing
a CMOS Inverter Using DESIGN-ARCHITECT – IC
- Refer to the
tutorials: Creating a Schematic with Design
Architect and Simulating a Design Using Eldo
- Enter the following
circuit in Design Architect:
- Check the schematic
for entry errors and save it.
- Start the Eldo simulator
from within Design Architect.
- Do a transient
analysis to confirm that the circuit is functioning properly:
- time step 0.1n
- stop time 40n
- voltage 0 to 5
- delay 0n
- rise time 0.1n
- fall time 0.1n
- pulse width 10n
- pulse period 20n
- Measure the rise time
and fall time of the output signal and the delay between the input and
output signals.(plot)
- Change the capacitance
value of the external capacitor to 200 fF.
- Measure the rise time
and fall time of the output signal and the delay between the input and
output signals.(plot)
- Change the NMOS and
PMOS transistors' widths to 20 lambda.
- Measure the rise time
and fall time of the output signal and the delay between the input and
output signals.(plot)
- Measure the transient
current for the VCC supply for the rise and fall transitions. (plot)
- Hand in the schematic
and four requested plots.
- What is the effect of
changing the transistor widths?
- What is the effect of
changing the external capacitance?
- What is the maximum
transient current?
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